Transmission Gate and the Sneaky Leakage Path

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Transmission Gate and the Sneaky Leakage Path

As shown in below, a transmission gate is comprised of a PMOS transistor and an NMOS transistor. When node A is high, both transistors conduct and IN and OUT are connected (bidirectional). When node A is low, both transistors are off and force a high impedance on both IN and OUT.

transgate_3

The common circuit symbol for transmission gate is as below:

transgate_4

Transmission gates are basic building blocks for logic circuitry, such as Flip-Flop, XOR gate, etc. The following diagram shows how a D-FF is built with transmission gate:

transgate_1

Here is a XOR gate:

transgate_2

 

Now let’s look at the sneaky leakage path caused by transmission gate in low power design. The following diagram is extracted from “Low Power Methodology Manual” book and the book can be found in: http://www.valpont.com/vlbgrefv/book-low-power-methodology-manual/

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