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Wireless receiver bit synchronization V

LiWong, 12/02/2018 0

Wireless

receiver, synchronization, wirelss

Case Study: How to Use Internal PLL as DFT Test Clock V

AnkitKumar, 12/02/2018 0

ASIC and FPGA

clock, dft, PLL

graphene cnt

ramkrishna, 04/20/2018 0

Car Electronics, Consumer Electronics, Medical Device

Optical phonons

ramkrishna, 04/20/2018 0

Consumer Electronics, Graduate, Research and Academia

Nanoscale Transistors

ramkrishna, 04/20/2018 0

Consumer Electronics, Graduate, IoT and Smart Devices

Nanoscale transistors

Clock Gating and Muxing on Xilinx FPGA V

FRANH, 03/26/2018 0

ASIC and FPGA, Space and Rad-Hardened Design

clock, FPGA, xilinx

ARM Cortex-M Processor Low Power V

Bill-Ramsey, 03/15/2018 0

ASIC and FPGA

arm, cortex, power

PCIE Tutorial: How to Test in Linux S

SD-RTL-DGN, 03/14/2018 1

ASIC and FPGA

linux, PCIE, test

4 4/5 (1 )

PCIE Tutorial: Hardware Oriented ASPM Link State and L1 Substates

SD-RTL-DGN, 03/13/2018 1

ASIC and FPGA

aspm, PCIE, power

4 4/5 (1 )

PCIE Tutorial: Software Initiated Device Power Management S

SD-RTL-DGN, 03/11/2018 1

ASIC and FPGA

PCIE, power

FinFET SRAM Vmin reduction and assist circuit

himmatr, 03/04/2018 0

Storage and Memory

memory, sram

Power Supply Connection in Low Power Design P

Precise-Design, 02/25/2018 0

ASIC and FPGA

isolation, lowpower, powerswitch, retention

Reset ARM subsystem in Single Core and Multiple Core System May Not be Easy V

Bill-Ramsey, 02/11/2018 0

ASIC and FPGA, MCU and DSP

AHB, arm, AXI, reset

Timing and Clock, How DFT and BE can Mess up your Design V

Palak_Nair, 02/10/2018 0

ASIC and FPGA

dft, timing

ARM ESL SOCDesigner Modeling and Simulation

jQiu, 02/10/2018 0

ASIC and FPGA, MCU and DSP

arm, esl, modeling, socdesigner

Precautions for using microwave signal analyzer for power measurement

BarryHampe, 01/31/2018 0

Test and Measurement

cable, microwave, radio, signal analyzer, test

New DRAM access technology doubled overclocking performance

Mortensen, 01/27/2018 0

ASIC and FPGA, DIY Projects, PCB and Board Design

DRAM, overclock

RTL Changes for DFT Support V

Sarkar, 01/23/2018 2

ASIC and FPGA

dft, RTL

4 4/5 (2 )

Bluetooth and Short Range Wireless Device Measurement P

jayhong, 01/21/2018 1

IoT and Smart Devices, RF and Optics, Test and Measurement

BER, bluetooth, measurement

5 5/5 (1 )

Cordic based Spur Cancellation P

jayhong, 01/20/2018 0

ASIC and FPGA, Wireless

cordic, spur

AXI to FW Register and Local Bus Interface V

Precise-Design, 01/03/2018 2

ASIC and FPGA

AXI

4.5 4.5/5 (2 )

PTPX Peak Power

QYang, 01/02/2018 1

ASIC and FPGA

power, ptpx

4 4/5 (1 )

Basics of At-Speed DFT test V

Sarkar, 12/29/2017 2

ASIC and FPGA

at-speed, dft

5 5/5 (2 )

Timing Constraint Example: Clock Mux and Clock Divider V

jshukla, 12/27/2017 0

ASIC and FPGA

clock, timing

PCIE Tutorial: How to Test in Linux S
SD-RTL-DGN 03/14/2018 4 4/5 (1 )

This is post #8 of 8 in the series “PCIE Tutorial” A series of blogs to introduce how PCIE...
PCIE Tutorial: Software Initiated Device Power Management S
SD-RTL-DGN 03/11/2018

This is post #6 of 8 in the series “PCIE Tutorial” A series of blogs to introduce how PCIE...
Optical phonons
ramkrishna 04/20/2018
PCIE Tutorial: Hardware Oriented ASPM Link State and L1 Substates
SD-RTL-DGN 03/13/2018 4 4/5 (1 )

This is post #7 of 8 in the series “PCIE Tutorial” A series of blogs to introduce how PCIE...
Nanoscale Transistors
ramkrishna 04/20/2018
Case Study: How to Use Internal PLL as DFT Test Clock V
AnkitKumar 12/02/2018

This is post #2 of 2 in the series “some DFT topics” some DFT topics SoC normally has on-chip...
Clock Gating and Muxing on Xilinx FPGA V
FRANH 03/26/2018

FPGA is heavily used in space electronics. Timing closure is always a challenge especially for space applications due to...
graphene cnt
ramkrishna 04/20/2018
Wireless receiver bit synchronization V
LiWong 12/02/2018

This is post #2 of 2 in the series “wireless receiver” wireless receiver In my other post, A Simple...
ARM Cortex-M Processor Low Power V
Bill-Ramsey 03/15/2018

Some topics discussed are Normal and deep sleep. Also dormant and power off defined in v8. WFI and WFE...

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