Body Biasing and PFET Nwell Connection
What is body and substrate biasing? How to connect PFET nwell? It is supposed to be a simple topic...
BLE HADM Basic and Usage for Keyless Entry
wlsPark 08/18/2019 4.5 4.5/5 (2 )
In Nov 2018, Belgium IMEC demonstrated the first solution for secure and very accurate passive keyless car entry based...
Isolation Low and High Cells for SoC Low Power Design
Isolation cells are a must-use for SoC low power design. This article covers: Schematics of source type and destination...
Issues and Solutions of Formality Formal Verification for Beginners
LarryB 08/19/2019 5 5/5 (1 )
I recently met a couple of issues when running formality to check equivalence of RTL vs synthesized netlist. I...
Discussion of ” A simple way to estimate the total power consumption of memories in an SoC”
There is a short blog about memory current estimation, A simple way to estimate the total power consumption of...
SoC IO Pad, Bump, Ball, and Pin
It could be confusing to beginners what are ball, bump, pad, and pin in chip design. Hope this doc...
Several Techniques to Reduce Memory Block Current Consumption
On chip embedded memory is a critical building block of a System on Chip (SoC). It not only occupies...
Case study: how to insert logic on cross hardmacro signal properly with power domain consideration
This is post #12 of 12 in the series “UPF and low power” UPF and low power In Case...
Use VCLP and UPF to report power domain crossing signals
In vclp shell, run below command report_crossover and it will report...
PEM and OBIRCH, Bright Spot Failure Analysis for Flip Chip
Photon Emission Microscopy (PEM) and optical beam induced current change (OBIRCH) are high efficient failure analysis techniques for fault...