Posts
FPGA is heavily used in space electronics. Timing closure is always a challenge especially for space applications due to...
Tag: xilinx
→ More TagsBookmark
Tutorials from so-logic: Basic FPGA Tutorial – Vivado v2016.4, VHDL Basic FPGA Tutorial – Vivado v2016.2, Verilog Basic FPGA...
Posts
Stan Hay has a good blog about How to Integrate Third-Party IP Hard Macro into Xilinx FPGA I...
Posts
Based on transaction initiator, there are two ways a PCIe card and a PC communicate with each other, PC...
Premium
Hi, if you need FPGA design or tutoring help, please feel free to contact me. I have been working...
Posts
RTL is zipped and attached. Here is file list: -sitesub_content- .design-HDMI.zip
Bookmark
XPE is for designers to get estimation of power early in the product design cycle. It is claimed to...
Bookmark
Arm’s bus protocols such as APB, AHB, AXI become industry standard and many IPs are designed with interface to...
Posts
This is post #2 of 2 in the series “ASIC/FPGA Basics” Talking about asic/fpga design basics Third parties normally...
Recent Posts
-
Clock Gating and Muxing on Xilinx FPGA
FRANH 03/26/2018 -
PCIE Tutorial: How to Test in Linux
SD-RTL-DGN 03/14/2018 -
Nanoscale Transistors
ramkrishna 04/20/2018 -
Precise-design Author Post
Precise-Design 03/06/2018 -
graphene cnt
ramkrishna 04/20/2018
Recent Premiums
-
An radio, wireless, and system design expert open to consultating
CHZhong 07/29/2016 -
PCB/EMI Expert with 8+ Years of Experience
Mortensen 04/07/2016
-
Experienced Embeded and iOS/Androd Developer
Teddy 05/21/2016
-
High Speed Digital Design Two-Day Workshop Handout
vonk 04/01/2016 -
FPGA and Digtial IP Design Firm Highly Experienced on PCIE/USB/MIPI
GVI_Tech 04/01/2016
