This project report was done a while ago. But the fundamental concept still holds. So it is still a good reference for graduate students or fresh engineers to understand Synopsys Behavioral Synthesis and RTL design. Even today Behavioral synthesis is not widely adopted in industry. We are still doing cycle accurate design and synthesis tool such as Synopsys DC and PC maintains design beh for each cycle which needs to be verified by formal tool. But this is way to go when design is more and more done at higher or more abstracted level.
Please feel free to drop any comment.