Quiz, How to Test This Simple Two Clock Structure

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Quiz, How to Test This Simple Two Clock Structure

Let’s say we have a simple design as below. There are two function modes. In one func mode, clk1 drives both block A and B and there are interconnects between A and B. In the other func mode, clk2 drives block B only and block A is not clocked and is not in use. In this article we will discuss how this design is tested in DFT mode. Or what clock rate should be used to test block A and B?

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We are a small team of ASIC and FPGA design engineers with combined >40 years of experience. We successfully led several chips through the whole design to TO process. Familiar with Xilinx FPGA, we designed complicated system of using multiple FPGAs to verify complicated ASIC and also for the final products. We are interested in working as independent contractor for your projects. Feel free to contact us.
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