• Morton1 posted in Group logo of ASIC and FPGAASIC and FPGA 1 year, 8 months ago  · , 0, 0

    Why #clock buffer on clock #pad input

    See clock buffers on clock pad inputs. I think clock buffer is needed for all signals declared as clocks instead of normal signal buffer. Clock buffer consumes more power but has better balance of rising and falling edge.

    Does it sound right?