debugged an interesting issue recently. interrupt to cm3 is asserted high but cm3 doesnot service it. finally realize cm3 is configured to treat irq as pulse type and not level type. below is from arm doc.
The processor supports both level and pulse…[Read more]
Siri resides on your device side and not on cloud as other options. I think this is a big plus. Not only for privacy and safety concern but also it makes solution work without an Internet connection. Not convinced the author thinks it is a con and said there is issue when connecting to iot…[Read more]
Opencores has a ARM compatible 32bit processor core called Amber. But it uses ARM v2a ISA which is pretty old. According to below slides (page 35), v2a is used on ARM2as and ARM3. According to amber intro, v2a is adopted because 1. not covered by patent 2. still supported by GNU…[Read more]