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hollis replied to the topic Run multiple tests out of the same modelsim compiled work library? in the forum
ASIC and FPGA 4 years, 5 months ago · , 0, 0
The issue I can think of is your rtl code may have lots of `ifdef. Sure the final code that you put into chip or fpga have a fixed defines. But when you run simulation, many times you want to run with different defines. +define+arg affects compile phase so different tests may have different…[Read more]
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hollis commented on the post, AHB to WISHBONE, WISHBONE to AHB, and AHB to PCI Bridges in Verilog 4 years, 8 months ago · , 0, 0
Wishbone is not popular as AMBA dominates in SoC. Many IPs on opencores use wishbone so these bridges come in handy. But if you can, I’d say you may want to replace wishbone with AMBA totally especially for burst operation.
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hollis commented on the post, Some PCB EMI Guidelines Learned out of My Previous Projects 4 years, 8 months ago · , 1, 0
Mortensen, nice summary. Good to know the 20H rule and ESD protection inside a closure. I was wondering whether to pour copper along the edge of board. I I heard someone suggests to run a loop of ground along the edge of board. Is it a good idea?
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hollis commented on the post, GCR and Solar Radiation and their Effects on Earth Orbit Satellites 4 years, 8 months ago · , 0, 0
Good introduction. I guess commercial components are not space graded. So space components are specially made? How are they different from commercial graded components?
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hollis commented on the post, A Flexible Digital Fractional Clock Divider with Verilog Code 4 years, 10 months ago · , 1, 0
Since clock cycle varies, we use the min clock cycle to set constraint?
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hollis commented on the post, Use DCM and MMCM for Xilinx FPGA Clock Deskew 4 years, 10 months ago · , 1, 0
Well presented. So IBUF and OBUF differences in timing can not be compensated. This limits how good is the balancing.
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hollis commented on the post, PCIE Gen2 x4 DMA Design Example with Xilinx Kintex-7 Connectivity Kit 4 years, 10 months ago · , 0, 0
Interesting. Not sure where I can find the board to give it a try.
hollis posted on Lakeside_Embedded‘s wall 4 years, 8 months ago · , 0, 0
@lakeside_embedded Hi Lakeside Team
Thanks for ARM training posts. In my system, I have a CM4 and CM0 in my system. I am thinking to run RTOS on both of them. Which RTOS do you suggest?
Thanks
hollis posted in
Big Data and Ethernet 4 years, 10 months ago · , 0, 1
[Trends] Amazon pushes the trend for vertical integration with acquisition of Annapurna
embeddedblog.blogspot.com/2016/01/amazon-pushes-trend-for-vertical.html
Amazon bought Israel-based Annapurna Labs back in January 2015. Annapurna has developed 32bit and 64bit chips with the ARMv7 and…[Read more]
hollis posted in
ASIC and FPGA 4 years, 10 months ago · , 0, 0
[Video] EE241 Advanced Digital IC
https://itunes.apple.com/us/itunes-u/ee-241-spring-2006-advanced/id461115048?mt=10
Free video courses on iTunes.