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FRANH
13.0
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Clock Gating and Muxing on Xilinx FPGA
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FRANH 03/26/2018 -
Body Biasing and PFET Nwell Connection
FRANH 09/10/2019 4 4/5 (1 ) -
Microcontroller Code Execution and ISP of Flash ROM and RAM
FRANH 02/10/2020
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FRANH posted in
ASIC and FPGA 7 months, 2 weeks ago · , 0, 0
4th wave of #fpga dev, licensing fpga logic to gpu, cpu, asic vendors for datacenter and hpc markets
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FRANH posted in
Space and Rad-Hardened Design 2 years, 8 months ago · , 0, 0
Software in #radiation env ll
Notice there is mem #scrub rate calculation xls at this site. You can use it to cal how often to scrub mem based on radiation env, mem type/size, etc. idea is to avoid errors which are not correctable. Doesnt necessarilly mean single error since you may used…[Read more]
FRANH posted in
Space and Rad-Hardened Design 2 years, 8 months ago · , 0, 0
Software works in #radiation env
Good post from rsjaffe
NASA has a paper on radiation-hardened software. It describes three main tasks:
Regular monitoring of memory for errors then scrubbing out those errors,
robust error recovery mechanisms, and
the ability to reconfigure if something…[Read more]
FRANH posted in
Networking and Interconnect 4 years, 1 month ago · , 1, 1
NVMe, PCIe on storage side
NVMe has two specs, NVM Express (PCIe) and NVM express over Fabrics (RDMA and Fibre). PCIe is tailored to meet networked storage throughput and interconnect requirements.…[Read more]