How to Transmit data at Specific Time at the End of Processing Chain

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How to Transmit data at Specific Time at the End of Processing Chain

In wireless transmitter design, we face the requirement that tx data needs to show up at the end of processing chain, normally at antenna, at specific time. It can not be too late or early. Reason is peer on the other side of communication channel expects to receive data at this moment.¬†There normally comes with a small¬†listening window.¬†Out of this window¬†tx data won’t be received by the other side.


The challenge is tx processing chain can be quite complicated and involves many processing elements and each has its own delay. Some of the elements may also need other supporting elements to operate at proper time for it to function. For example, an analog module on tx chain may be powered by some LDO. This LDO needs to be turned on at proper time and for the analog module to be powered properly. But LDO needs to be turned off when tx is one to save power. Another example is an analog module may need calibration before processing tx data.


In addition, tx data may be prepared by firmware. Firmware gets tx data ready and kicks off hw to start tx. But firmware processing time is not guaranteed. Firmware may see other high priority task or get interrupted so firmware kick off moment can also vary.


In the following we discuss how to design a robust and flexible tx system to accommodate firmware timing ambiguity and hw processing delays. We also discuss a way to design a highly programmable state machine which will be needed in this system.


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Highlights: 481 words
We are a small design team with many years of experience in ASIC/FPGA IP and system designs which involve UART, SPI, AHB, AXI, ACE, USB, PCIE, etc.

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