MCU and DSP

China’s national protection to foster indigenous x86 cpu design

Having the support of these large OEMs, not to mention the constellation of smaller builders inside China, is important as the country now looks to enforce its new “3-5-2” edict that comes as a result of the trade war. This p…[Read more]

Andes #riscv CON webinar series

http://www.andestech.com/en/2020-risc-con-en/

Topics Covered in RISC-V CON
▶ The powerful AndesCore™ V5, D25, 27-series, 45-series

▶ The cutting edge Andes RISC-V vector extension processor

▶ The leading solution Andes Custom Extension™

▶ The diverse AI…[Read more]

#riscv to coexist with Arm?

RISC-V grows globally as an alternative to Arm and its license fees | VentureBeat

https://venturebeat.com/2019/12/11/risc-v-grows-globally-as-an-alternative-to-arm-and-its-license-fees/

Arm is the most successful microprocessor…

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Intel new multi core cpu has more L2 cache per core

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Western Digital Rolls-Out Two New SweRV RISC-V Cores For Microcontrollers

https://www.anandtech.com/show/15231/western-digital-rollsout-two-new-swerv-riscv-cores

Western Digital has added two new processor cores — the SweRV Core EH2 and the SweRV Core E…

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Disruptive shift of server cpu from x86 to #arm based with AWS new server cpu

https://www.scylladb.com/2019/12/05/is-arm-ready-for-server-dominance/