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Slow Turn-off due to cap discharging consumes extra energy

Slow Turn-off due to cap discharging consumes extra energy
2 Voices |2 Posts |300+ | Discussion Rooom: ASIC and FPGA

This topic contains 1 reply, has 2 voices, and was last updated by  Precise-Design 1 year, 10 months ago.

  • Author
  • balasubramanian
    Research Staff
    Clemson Univ

    I have seen this statement from multiple sources. Below is one of examples. But as long as dc-dc converter is turned off and no current is drawn from the power source, there is no power penalty, right? Since output capacitor is already charged, slow discharging doesn’t cause extra pwr consumed. Actually slow discharging may be helpful since next charging will take less energy to charge?

  • Precise-Design
    Post count: 1

    Good question!

    It is safe to say it is case by case. But for designs we worked on, slow discharging does not cause issue. On the contrary, some design put in shunt resistor or discharge resistor. When the ldo or buck is turned off, shunt res is enabled and it will speed up discharge. But valuable energy is unnecessarily discharged. Next time that ldo or buck is turned on, it takes more energy to recharge it. It translates higher power consumption.


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