ASIC and FPGA

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In ASIC/SOC Which Area is More Promising for Young Chip Engineers


Promising Areas

  • Simulation and Verification
  • SOC Integration
  • SOC IP Design
  • DFT
  • Backend PrimeTime and Synthesis
  • Backend Place and Routing
  • Others

Maximum 0 options allowed

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  • Group logo of ASIC and FPGAmukhop posted 4 weeks ago · , 0, 0

  • Group logo of ASIC and FPGAcmalik posted 4 weeks ago · , 0, 0

    HLS for Vision and Deep Learning Hardware Accelerators Seminar

    Biltmore Hotel
    Santa Clara, CA
    May 7th, 2019
    9:00 AM – 4:00 PM

    Holiday Inn Spectrum
    Irvine, CA
    May 9th, 2019
    9:00 AM – 4:00 PM

    Deep learning applications are exploding, especially those that use images for computer vis…[Read more]

  • Group logo of ASIC and FPGASarkar posted 1 month ago · , 0, 0

    Use #lbist and #mbist for in field test

    Lbist and mbist are commonly used for chip manufacturing test. But they can be and is being used in infield test.

    There are defects which may appear during the field operation of device. The infield failures are mainly because of latent faults which…[Read more]

  • Group logo of ASIC and FPGAGoli.Trends posted 2 months ago · , 0, 0

    Facebook plans to design its own chip, likely for #AI

    The social media company is seeking to hire a manager to build an “end-to-end SoC/ASIC, firmware and driver development organization,” Facebook could use such chips to power hardware devices, artificial intelligence software and ser…[Read more]

  • Don’t forget to swap memory behavioral model with #Xilinx #Coregen model when do FPGA synthesis

    An intern wrote a small block. When synthesize the whole design with this new block using Xilinx #Vivado, it take way longer time to finish. It turns out his block has a big size memory. He…[Read more]

  • 40 GPUs on a single silicon wafer to lower interconnect power

    #Interconnect can be done at board level, #package level, and wafer level. “Silicon interconnect fabric” employs wafer level connection.

    [Read more]

  • Chip design is PPT ?!

    Chip business is Powerpoint? Yes, BP IS PPT:

    B: Business model
    P: Product definition
    I: IP design and qualification
    S: System integration
    P: Physical design
    P: Package design
    T: Test

  • Group logo of ASIC and FPGAMattChiu posted 3 months ago · , 0, 0

    How IBM handles L3/L4 #memory #cache in power8, power9, and power10

    [Read more]





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