How to build a model to verify power trace noise performance

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How to build a model to verify power trace noise performance
1 Voices |1 Posts |300+ | Discussion Rooom: Signal Integrity

This topic contains 0 replies, has 1 voice, and was last updated by  Sahir_Devar 4 years, 6 months ago.

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  • Recently¬†debugging an issue which I think is related to¬†high noise level of the power trace on¬†PCB. I¬†am thinking to build a model for this power trace based on PCB parameters such as length, width, # of vias, # of layers it is routed on, etc. Then I can give it a clean power source and¬†check the model output¬†in the¬†sim env. I am new to SI and PI. Does it make sense and¬†is a good¬†way to go?

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