Date/Time
Date(s) - 04/25/2016 - 04/27/2016
All Day
Location
Caesars Palace
Categories
- Organization: IEEE, University of Texas at Dallas
- Disciplines: Engineering, Computer Science
- Subdisciplines: Electrical Engineering,Engineering, Hardware & Architecture,Security & Privacy
- Event type: Symposium
- Venue: Caesars Palace
The IEEE VLSI Test Symposium (VTS) explores emerging trends and novel concepts in testing, debug and repair of microelectronic circuits and systems.
Topics:
– Analog/Mixed-Signal/RF Test
– ATPG & Compression
– ATE Architecture & Software
– Automotive Test & Safety
– Built-In Self-Test (BIST)
– Defect & Current Based Test
– Defect/Fault Tolerance
– Delay & Performance Test
– Design for Testability (DFT)
– Design Verification/Validation
– Embedded System & Board Test
– Embedded Test Methods
– Emerging Technologies Test
– FPGA Test
– Fault Modeling and Simulation
– Hardware Security
– Low-Power IC Test
– Microsystems/MEMS/Sensors Test
– Memory Test and Repair
– On-Line Test & Error Correction
– Power/Thermal Issues in Test
– System-on-Chip (SOC) Test
– Test Standards
– Test Economics
– Test of Biomedical Devices
– Test of High-Speed I/O
– Test Quality and Reliability
– Test Resource Partitioning
– Transients and Soft Errors
– 2.5D, 3D and SiP Test
Website Link: http://tttc-vts.org/public_html/new/2016/
