Employing Cordic Algorithm in Digital Wireless Receiver Design

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Employing Cordic Algorithm in Digital Wireless Receiver Design

In the last post, we talked about how to use Cordic to implement DDS. Here let’s take a look of an example how to apply DDS in wireless receiver design.


Above shows the IF to DC down-conversion and some DC processing done in digital domain. Radio processing stages such as LNA, RF LO, mixer, analog filtering, and ADC are not shown. Here DDS is used to efficiently generate channel specific local carrier. Its cos and sin outputs are mixed with input I and Q streams to generate mixer outputs, which are further filtered by low pass filters, I_LPF for I channel and Q_LPF for Q channel. These two filters are also called channel selective filter. Then we down-sample I and Q since the desired signal now only occupies a small portion of the whole band. Note in modern digital receiver and transmitter design, you may see lots of down-sampling and up-sampling. The basic idea is to lower the processing logic clock rate to lower power consumption.

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1 Comment
  1. RBelkin 5 years ago

    Excellent. Instead of DDS and multiplication based mixer, we can use cordic based derotator which is much more calculation efficient. It also shows IQ to mag/phase conversion with cordic and the usage is explained in the article.


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