AXI to FW Register and Local Bus Interface

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AXI to FW Register and Local Bus Interface

AMBA AXI is commonly used these days. Here we present a simple AXI to fw register and local bus interface design. So fw can use axi and then this interface to read/write registers. The local bus is a simple mem/reg friendly bus and can be used to hook up mem or register.

Below is the interface ports. We assume there is a core called mcore and mcore_upi means mcore’s user programmable interface.

Axi bus has its own clk and reset, axi_clk/rst which are normally of faster clk rate. clk/rst is used on fw reg and local bus side which can be much slower than axi_clk/rst to save power.

Ctrl_sampl_* are fw control signals going out to ctrl hw. Stts_sampl_* are hw status signals and are hooked up to axi registers so fw can read out.

Here is the fw register write and read part

As can be seen register addresses need to be defined. It is done in a file called regif.v.

 

Full rtl code is shown in below.

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We are a small design team with many years of experience in ASIC/FPGA IP and system designs which involve UART, SPI, AHB, AXI, ACE, USB, PCIE, etc.
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2 Comments
  1. Bill-Ramsey 9 months ago
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    Another way is to find a axi2apb bridge and the a apb slave for reg access

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  2. AntoniaP 10 months ago
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    Doing a Xilinx fpga project. Xilinx amba ip is axi and not ahb. Applies this post code to allow microblaze fw to control hw modules. Works perfect!

    5

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